In the semiconductor electronics industry, various semiconductor components are packaged in standard component packages. One such standard package is the dual-in-line package (known as a DIP) which essentially comprises an enclosed package containing the semiconductor component with parallel rows of leads extending from opposite edges of the package. Other known package designs include the flat pack and, more recently, the leadless chip carrier developed to contain large scale integration (LSI) type semiconductor components. Such LSI components are difficult to house efficiently in a standard DIP package because of the complexity of the interconnection between the package and the chip. In addition, a DIP package for an LSI component must be extended to a length which occupies an undesirably large surface area on a printed circuit board to accommodate the number of leads required to connect the device to the printed circuit board. The leadless chip carrier comprises a substantially flat rectangular ceramic or plastic base piece with a centrally located cavity on one face thereof. The chip is mounted on the floor of the cavity and the cavity enclosed and hermetically sealed with a ceramic or plastic cover. Terminal lands or contacts are arranged along the edges and/or the sides of the base piece providing a much more compact design than DIP packages.
Because of the complexity of integrated circuits and other semiconductor components, particularly LSI components, it has become desirable to test each component. Standard testing procedures include mounting a plurality of semiconductor components on a test board, known as a burn-in board, and simultaneously subjecting the components to various environmental and electrical stresses while mounted on the burn-in board. The components are then removed from the burn-in board and tested. Those components failing the functional tests are discarded or classified according to test performance. Although the configuration of the burn-in board may vary for various reasons, all burn-in boards generally arrange the components in rows and columns of sockets mounted on the burn-in board with the number and spacing of the sockets varying according to the testing methods and the component to be tested. Various socket designs are also employed for similar reasons.
Since it is desirable to burn-in or test the entire production output from an assembly line of semiconductor components, it is also desirable that the loading and unloading of the burn-in board be accomplished as rapidly and economically as possible. For this purpose, various configurations of burn-in boards are employed. However, semiconductor components, even when mounted in packages, must be handled carefully to avoid damage to themselves or to the package. For instance, the parallel leads on a DIP may be damaged or bent while being inserted on a socket on a burn-in board if not aligned correctly with the socket. Even if aligned correctly, the leads may become worn through repeated insertion and removal from a socket. Further, the force required to insert and remove electronic circuit packages of all types from a conventional socket imposes undesirable stresses on the component and the package. For this reason, zero insertion force sockets have been developed and, in particular, such sockets have been employed on burn-in boards. It is to this type of zero insertion force socket that the present invention is directed and in particular to the problem of unloading the electronic circuit package therefrom.
Zero insertion force sockets for DIPs provide an opening for each lead on the DIP. The openings are of a much larger diameter than the lead and thus the component may be inserted or removed therefrom without appreciable resistance. When the component is inserted in the socket, a mechanism on the socket is engaged to grip the leads of the DIP and secure it in place. The mechanism must be disengaged to allow the component to be removed. It is known to resiliently bias the mechanism to an engaged position, requiring a compressive force to be applied to the socket in order to shift the mechanism to a disengaged position and enabling a DIP to be inserted or removed from the socket without substantial resistance.
U.S. Pat. No. 4,491,397, issued Jan. 1, 1985, shows a zero insertion force socket for use with a leadless chip carrier. The socket includes a housing having a rectangular cavity for receiving the leadless chip carrier. A plurality of rigid contacts are vertically mounted in the housing about the cavity and are biased to engage the terminal lands on the leadless chip carrier when placed in the cavity. A spreader is mounted on the housing and is capable of reciprocal motion in a vertical direction although it is resiliently biased to an upper position. When the socket is compressed by forcing the spreader downwardly toward the housing, the spreader deflects the contacts outwards from the cavity, thus allowing the leadless chip carrier to enter the cavity without resistance. When the spreader is released, it automatically resumes the upper position, allowing the contacts to spring inwardly to engage the terminal lands on the leadless chip carrier and secure it in the socket. The leadless chip carrier may be released by compressing the socket a second time as outlined above and extracting the leadless chip carrier.
The electronic circuit packages, of whatever type, may be loaded and unloaded by hand from the zero insertion force sockets on a burn-in board. This method, however, is extremely time-consuming and therefore expensive. Another problem associated with electronic circuit packages is that they must frequently be inserted into carrier tubes in an end-to-end relationship after being unloaded from the socket. The carrier tubes are widely used to store and transport the electronic circuit packages in large numbers. It is undesirable to individually load the electronic circuit packages into the carrier tubes by hand. Finally, any apparatus in contact with the electronic circuit packages may damage the semiconductor component contained therein if electric current is present or if static electricity is allowed to accumulate. None of these difficulties are satisfactorily overcome by existing equipment or methods for unloading electronic circuit packages from burn-in boards or the like.